The present invention relates to a self-diagnosis system and a test circuit determination method, and more particularly, to a self-diagnosis system including a test circuit having a redundant configuration, and a method for determining a test circuit having a redundant configuration.
In recent years, built-in self-test (BIST) circuits in which an LSI tester function for use in conducting a test for LSI (Large Scale Integration) is mounted in a chip have been actively developed. The use of BIST circuits leads to a reduction in time and cost of the LSI test as compared to the case where the LSI tester is mounted outside the chip.
Japanese Unexamined Patent Application Publication No. 2003-068865 discloses a configuration of a self-diagnosis device. The self-diagnosis device includes BIST circuits that perform self-diagnosis of semiconductor devices. The configuration of the self-diagnosis device disclosed in Japanese Unexamined Patent Application Publication No. 2003-068865 is described with reference to FIG. 11. The self-diagnosis device includes semiconductor devices 150 and 160, a main controller 400, a BIST controller 200, and a memory 300. Each of the semiconductor devices 150 and 160 includes a plurality of functional blocks and a plurality of BIST circuits. The main controller 400 controls the semiconductor devices 150 and 160. The BIST controller 200 controls the BIST circuits. The memory 300 stores a program for controlling the BIST controller 200.
The semiconductor devices 150 and 160 are semiconductor devices to be diagnosed. The semiconductor device 150 includes functional blocks 151 and 152 and BIST circuits 201 and 202. The BIST circuit 201 performs self-diagnosis of the functional block 151, and the BIST circuit 202 performs self-diagnosis of the functional block 152. The BIST circuits 201 and 202 are integrated in the semiconductor device 150 and are disposed in the vicinity of the functional blocks 151 and 152, respectively. Similarly, the semiconductor device 160 includes functional blocks 161 and 162 and BIST circuits 211 and 212. The BIST circuit 211 performs self-diagnosis of the functional block 161, and the BIST circuit 212 performs self-diagnosis of the functional block 162. The BIST circuits 201 and 202 are integrated in the semiconductor device 160 and are disposed in the vicinity of the functional blocks 161 and 162, respectively.
The BIST controller 200 is connected to the BIST circuits 201, 202, 211, and 212 through signal lines 301, 302, 311, and 312, respectively, and transmits diagnosis conditions corresponding to the functional blocks to the BIST circuits 201, 202, 211, and 212. Each of the BIST circuits transmits the diagnosis conditions received from the BIST controller 200 to the functional block to be diagnosed. Further, upon receiving a diagnosis result from the functional block, each of the BIST circuits transmits the diagnosis result to the BIST controller 200. The BIST controller 200 compares the diagnosis result received from each of the BIST circuit with a diagnosis expectation value received from the memory 300. The memory 300 is connected to the BIST controller 200 through a signal line 210, and stores the diagnosis conditions for the BIST circuits to diagnose each functional block, the diagnosis expectation value for each functional block, and the diagnosis results of each functional block.
The main controller 400 is connected to an external device (not shown), for example, a tester for a test, or a human interface device such as a key board. Further, the main controller 400 is connected to the BIST controller 200 through a signal line 220, and is connected to input/output terminals of the functional blocks through input/output signal lines 410, 420, 430, and 440, respectively. The main controller 400 performs processing, such as a typical numerical operation or image processing, by using the functional blocks based on an instruction from an external human interface device. Meanwhile, the main controller 400 can also perform diagnosis of each functional block based on a diagnosis pattern received from an external tester. Furthermore, the main controller 400 can transmit self-diagnosis results of the functional blocks of the semiconductor devices, which are obtained by the BIST controller 200, to the external tester or the like.